Patent
1991-03-22
1992-06-02
James, Andrew J.
357 72, 357 55, H01L 2348
Patent
active
051191717
ABSTRACT:
An improved semiconductor die for plastic encapsulated semiconductor device packages which impedes the inherent delamination caused by the differing expansion coefficients of the semiconductor die and plastic encapsulation. Rounded or tapered die corners and die edges decrease the stress from the plastic encapsulation that acts upon the semiconductor die. This reduced stress slows the delamination progression and leaves the operational circuitry unaffected for an increased period of time thereby increasing device lifetime.
REFERENCES:
patent: 4675717 (1987-06-01), Herrero
Egawa et al., "A 1-Mbit Full Wafer MOS RAM", IEEE Trans. Electron Dev. vol. ED-27, No. 8, pp. 1612-1621.
Hawkins George W.
Lesk Israel A.
Thomas Ronald E.
Bowers Courtney A.
James Andrew J.
Motorola Inc.
Wolin Harry A.
LandOfFree
Semiconductor die having rounded or tapered edges and corners does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor die having rounded or tapered edges and corners, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor die having rounded or tapered edges and corners will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2233201