Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1991-09-30
1994-06-21
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Bad bit
36523003, G11C 700
Patent
active
053233484
ABSTRACT:
Column repairing circuits 7a, 7b for repairing a DRAM in which there are defective memory cells in two columns are disclosed. The connection state of switching elements or circuits 51-5n, 61-6n, 71-7 (n+1), 81-8 (n+1) is determined as illustrated by appropriately disconnecting fuses in fuse links provided respectively in circuits 7a, 7b. Accordingly, column selecting lines Y2a and Y (n+1) b in memory array blocks 891a, 891b are not activated. The two repairing circuits 7a, 7b are provided spaced apart from each other on a semiconductor substrate, so that excessive concentration of fuse elements and switching elements or circuits is prevented.
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Kikuda Shigeru
Kinoshita Mitsuya
Miyamoto Hiroshi
Mori Shigeru
Morooka Yoshikazu
Dinh Son
LaRoche Eugene R.
Mitsubishi Denki & Kabushiki Kaisha
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