Layered capacitor structure for a dynamic random access memory d

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257308, H01L 2170

Patent

active

053230370

ABSTRACT:
An improved method and resulting structures for producing a layered capacitor structure of memory cell of a DRAM device wherein a doped polysilicon spacer operates as a dopant source for an overlying polysilicon layer on the vertical and sharply inclined surfaces.

REFERENCES:
patent: 4910566 (1990-03-01), Ema
patent: 4951175 (1990-08-01), Kurosawa et al.
patent: 4974040 (1990-11-01), Taguchi et al.

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