High speed CMOS current sense amplifier

Details High speed CMOS current sense amplifier High speed CMOS current sense amplifier

1985-04-11

1987-03-31

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Differential sensing

365210, G11C 702

Patent

active

046548319

ABSTRACT:
A CMOS current sense amplifier circuit for providing a high speed of operation includes a sense amplifier, a dummy sense amplifier and an operational sense amplifier. A memory array is formed of a plurality of core transistors which are arranged in a plurality of rows of word lines and a plurality of columns of bit-lines. A dummy bit-line is formed of a plurality of core transistors which are arranged in parallel along the rows of word lines. A first pass transistor and a plurality of Y-pass transistors are coupled between the sense amplifier and the memory array. Second and third pass transistors are coupled between the dummy sense amplifier and the dummy bit-line. A plurality of N-channel MOS transistors are used to clamp all of the bit-lines in the array and dummy bit-line to a ground potential. The operational sense amplifier is responsive to the sense amplifier, dummy sense amplifier and the clamping transistors for generating an output signal which has a fast response time when making a low-to-high transition (that is when selecting an unprogrammed memory cell).

REFERENCES:
patent: 4223394 (1980-09-01), Pathak et al.

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