Substrate-triggering electrostatic discharge protection circuit

Details Substrate-triggering electrostatic discharge protection circuit Substrate-triggering electrostatic discharge protection circuit

1998-03-03

2000-06-06

Meier, Stephen D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257354, H01L 2362, H01L 2701

Patent

active

060722193

ABSTRACT:
A substrate-triggering ESD protection circuit is provided for use on a deep-submicron integrated circuit for ESD protection of the integrated circuit. The ESD protection circuit is incorporated between an input end and the internal circuit of the integrated circuit formed on a substrate. The ESD protection circuit utilizes a featured substrate-triggering operation to trigger the ESD-protection transistors formed in N-wells of the substrate into conducting state so as to bypass the ESD current to the ground. The ESD protection circuit allows a simplified semiconductor structure to fabricate, while nonetheless providing an increased level of ESD protection capability for the deep-submicron integrated circuit.

REFERENCES:
patent: 4829350 (1989-05-01), Miller
patent: 5543650 (1996-08-01), Au et al.
patent: 5615073 (1997-03-01), Fried et al.
patent: 5811856 (1998-09-01), Lee

Affiliated with

Also associated with

Rating

Substrate-triggering electrostatic discharge protection circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Substrate-triggering electrostatic discharge protection circuit , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate-triggering electrostatic discharge protection circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2215568