Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1992-12-23
1994-08-09
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Data refresh
36523003, 365203, G11C 700
Patent
active
053372832
ABSTRACT:
A dynamic random access memory device has a memory cell array arranged in a matrix form, a pair of digit lines connected to each row and transferring data read out from a memory cell designated by a row address, an amplifier activated in response to an activation command for amplifying data on the pair of digit lines, a selector for transferring amplified data of the amplifier designated by a digit address to a data bus, and a controller for maintaining the active state of the amplifier means during an interval between transferring of the amplified data by the digit selector and subsequent designation of the row address.
REFERENCES:
patent: 4941128 (1990-07-01), Wada
patent: 5148400 (1992-09-01), Fujii
patent: 5184324 (1993-02-01), Ohta
patent: 5226139 (1993-07-01), Fujishima
LaRoche Eugene R.
NEC Corporation
Zarabian A.
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