Method of fabricating bit lines by damascene

Details Method of fabricating bit lines by damascene Method of fabricating bit lines by damascene

1998-12-04

2000-06-06

Elms, Richard

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438617, 438500, 437300, H01L 214763

Patent

active

060718048

ABSTRACT:
A method of fabricating bit lines by damascene. A substrate having a first dielectric layer is provided, and a bit line contact is formed within the first dielectric layer. A hard material layer is formed on the first dielectric layer to expose the bit line contact. A second dielectric layer is formed on the hard material layer. An opening and a trench are formed within the second dielectric layer to expose the bit line contact and the hard material layer. A hard material spacer is formed on the sidewall of the opening and the trench. A tungsten silicide layer fills the opening and the trench to serve as a bit line on the bit line contact and an interconnect of the bit line.

REFERENCES:
patent: 5691238 (1997-11-01), Avanzino et al.
patent: 5693568 (1997-12-01), Liu et al.
patent: 5893748 (1997-02-01), Lin

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