Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1999-01-06
2000-09-05
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438711, 438712, 438713, 438723, 438724, H01L 213065
Patent
active
061142514
ABSTRACT:
An isolation structure and a method of making the same are provided. In one aspect, the method includes the steps of forming a trench in the substrate and a first insulating layer in the trench that has a bottom, a first sidewall and a second sidewall. Silicon nitride is deposited in the trench. Silicon nitride is removed from the bottom of the first insulating layer to establish a layer of silicon nitride on the first and second sidewalls by performing a first plasma etch of the deposited silicon nitride with an ambient containing He, SF.sub.6, and HBr, and a second plasma etch with an ambient containing He, SF.sub.6, and HBr. An insulating material is deposited in the trench. The method provides for reliable manufacture of nitride liners for trench isolation structures. Scaling is enhanced and the potential for parasitic leakage current due to liner oxide fracture or irregularity is reduced.
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Gardner Mark I.
Hause Frederick N.
Nguyen Thien T.
Advanced Micro Devices , Inc.
Honeycutt Timothy M.
Tran Binh X.
Utech Benjamin L.
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