Method of fabricating a thin film transistor array

Details Method of fabricating a thin film transistor array Method of fabricating a thin film transistor array

1986-03-14

1987-03-31

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156655, 156656, 156657, 156662, 156667, 350332, 350339R, 428 1, H01L 21306, B44C 122, C03C 1500, C23F 102

Patent

active

046541179

ABSTRACT:
An array of thin film transistors is fabricated by forming a plurality of spaced closely adjacent metallic source and drain electrodes on an array area of a transparent substrate, forming semiconductor layers on the substrate between each adjacent pair of source and drain electrodes in overlapping relation to the edges of each such pair, covering the semiconductor layers with a gate insulation film that extends over substantially all of said array area, forming a transparent gate electrode layer over the gate insulation film, covering the transparent gate electrode layer with a photosensitive resin layer which is then exposed to light through the transparent substrate and transparent gate electrode layer with the metallic source and drain electrodes acting as masks, developing the photosensitive resin layer to remove portions thereof other than the exposed portions, and etching the transparent gate electrode with the remaining portions of the resin layer serving as masks thereby to form the gate electrodes of the thin film transistors in the array.

REFERENCES:
patent: 4188095 (1980-02-01), Nishimura et al.
patent: 4336295 (1982-06-01), Smith
patent: 4502917 (1985-03-01), Chamberlin

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