Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1996-06-20
1998-06-09
Yoo, Do Hyun
Static information storage and retrieval
Read/write circuit
Bad bit
36523003, G11C 700
Patent
active
057645744
ABSTRACT:
A method and apparatus for independent redundancy programming of individual components of a multiple-component semiconductor device assembly. In the disclosed embodiment, a multiple-chip memory module includes a plurality of memory devices each having redundant circuitry therein for facilitating backend repair of those devices should a defective memory cell (or group of memory cells) be detected. The redundant circuitry in each device is responsive to a predetermined combination of programming signals applied to terminals of that device to activate a redundant column (or row) of memory cells into operation in place of a column (or row) containing a defective memory cell. In the disclosed embodiment, the predetermined combination of programming signals includes at least one signal applied to a data terminal of the device. The interconnection of individual memory devices in the multiple-device assembly is such that a predetermined combination of signals applied to predetermined terminals of the assembly, including at least one data terminal thereof, can uniquely identify an individual one of the plurality of individual memory devices in the assembly, facilitating back-end repair of the assembly without requiring disassembly thereof.
REFERENCES:
patent: 5430679 (1995-07-01), Hiltebeitel et al.
patent: 5455798 (1995-10-01), McClure
patent: 5491664 (1996-02-01), Phelan
patent: 5528600 (1996-06-01), El Ayart et al.
patent: 5550394 (1996-08-01), Sukegawa et al.
Duesman Kevin
Gilliam Gary R.
Nevill Leland R.
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