Sub-quarter micron silicon-on-insulator MOS field effect transis

Details Sub-quarter micron silicon-on-insulator MOS field effect transis Sub-quarter micron silicon-on-insulator MOS field effect transis

1998-10-22

2000-12-12

Abraham, Fetsum

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257213, 2572887, 257316, 257377, 257382, 257383, 257384, H01L 2900

Patent

active

061602930

ABSTRACT:
A semiconductor thin film structure includes source/drain regions and a channel region positioned between the source/drain regions. The semiconductor thin film structure extends directly on and in contact with a surface of an insulation region. At least one of the source/drain regions includes a semiconductor material region extending directly over and in contact with the surface of the insulation region and a refractory metal silicide layer extending directly on and in contact with the semiconductor material region. The refractory metal silicide layer has a first thickness which is equal to or thicker than a half of a second thickness of the channel region, thereby suppressing any substantive kink effect. The first thickness of the refractory metal silicide layer is also thinner than a third thickness of the source/drain regions, so that at least a majority part of a bottom surface of the refractory metal silicide layer has a junction interface with the semiconductor material region of the source/drain regions, thereby reducing a parasitic resistance of the source and drain regions.

REFERENCES:
patent: 5883396 (1999-03-01), Reedy et al.
N. Kistler et al., "Sub-Quarter-Micrometer CMOS on Ultra-thin (400 .ANG.) SOI", pp. 235-237, IEEE Electron Device Letters, vol. 13, No. 5, May 1992.
K. Azuma et al., "Application of Ti Salicide Process on Ultra-thin SIMOX Wafer", pp. 30-31, Proceedings 1995 IEEE International SOI Conference, Oct. 1995.

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