Semiconductor device with sidewall insulating layers in the capa

Details Semiconductor device with sidewall insulating layers in the capa Semiconductor device with sidewall insulating layers in the capa

1996-07-29

2000-12-12

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257311, 438253, 438396, H01L 27108, H01L 2976, H01L 31119, H01L 2994

Patent

active

061602841

ABSTRACT:
Source/drain regions of an MOS transistor are formed at a surface of a p-type silicon substrate. A storage node electrically connected to the source/drain regions penetrates a bit line to reach the n-type source/drain region. The storage node and the bit line are insulated from each other by a sidewall insulating layer. Thus, a semiconductor memory device suitable for high integration is obtained in which short-circuit between the storage node and the bit line on a gate electrode layer can be prevented.

REFERENCES:
patent: 5235199 (1993-08-01), Hamamoto et al.
patent: 5389566 (1995-02-01), Lage
patent: 5399518 (1995-03-01), Sim et al.
patent: 5441909 (1995-08-01), Kim
patent: 5459688 (1995-10-01), Pfiester et al.
patent: 5504041 (1996-04-01), Summerfelt
patent: 5565372 (1996-10-01), Kim
patent: 5580811 (1996-12-01), Kim
patent: 5777358 (1998-07-01), Yajima

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