Method for manufacturing LDD type MIS device

Fishing – trapping – and vermin destroying

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437 57, 437 58, 437 35, 437 41, H01L 2170

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active

056144326

ABSTRACT:
In a method for manufacturing a CMIS transistor, after gate electrodes are formed, deep P type impurity regions and shallow N type impurity regions are formed within both of a PMOS area and an NMOS area. Then, after sidewall insulating layers are formed on sidewalls of the gate electrodes, P type impurity ions are introduced into the PMOS area and N type impurity ions are introduced into the NMOS area.

REFERENCES:
patent: 5015595 (1991-05-01), Wollesen
patent: 5024960 (1991-06-01), Haken
patent: 5170232 (1992-12-01), Narita
patent: 5270226 (1993-12-01), Hori et al.
patent: 5292674 (1994-03-01), Okabe et al.

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