Semiconductor memory device with redundant decoder available for

Static information storage and retrieval – Read/write circuit – Bad bit

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365201, G11C 700

Patent

active

055441068

ABSTRACT:
A semiconductor dynamic random access memory device is equipped with rows of redundant memory cells for replacing defective rows of regular memory cells therewith, and a redundant system associated with the rows of redundant memory cells is enabled in a test sequence for selectively energizing redundant word lines in response to external address signals so as to eliminate an address pointer only used in the test sequence.

REFERENCES:
patent: 5373471 (1994-12-01), Saeki et al.

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