MOS semiconductor device and method of fabricating the same

Details MOS semiconductor device and method of fabricating the same MOS semiconductor device and method of fabricating the same

1992-12-21

1994-12-06

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257344, H01L 2300, H01L 2978

Patent

active

053713915

ABSTRACT:
A first gate layer of a first conductor layer is formed on a gate oxide layer and selectively covered with a second gate layer of a second conductor layer. The first and second gate layers are used as a mask and a semiconductor substrate is thermally oxidized to thereby increase a thickness of a portion of the gate oxide layer except the gate layers and cover the second gate layer and the portion having the increased thickness of the gate oxide layer with a third conductor layer. Thereafter, a side wall of an insulating layer is formed on a side portion of the second gate layer and is used as a mask to form a third gate layer. The first, second and third gate layers and the side wall are used as a mask and impurity is introduced into the semiconductor substrate relatively heavily to thereby form a heavily doped impurity layer.

REFERENCES:
patent: 4356622 (1982-11-01), Widmann
patent: 4951100 (1990-08-01), Parrillo
patent: 5091763 (1992-02-01), Sanchez
Blum et al, "Sidewall Oxide Structure and Method for Polysilicon Gate . . . " IBM Tech, vol. 26, No. 3B, Aug. 83, pp. 1316-1317.
"Reduction of Gate Overlap Capacitance of Inverse-T Transistor" 51th Science of applied Physics Association pp. 575, 26p-G-5.

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