Method of depositing polysilicon, method of fabricating a field

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438680, 438684, H01L 214763

Patent

active

061598526

ABSTRACT:
In a method of depositing polysilicon comprises providing a substrate within a chemical vapor deposition reactor, with the substrate having an exposed substantially crystalline region and an exposed substantially amorphous region. A gaseous precursor comprising silicon is fed to the chemical vapor deposition reactor under conditions effective to selectively deposit polysilicon on the crystalline region and not the amorphous region. In another aspect a method of fabricating a field effect transistor on a substrate comprises forming a gate dielectric layer and a gate over semiconductive material. A gaseous precursor comprising silicon is fed to the chemical vapor deposition reactor under conditions effective to substantially selectively deposit polysilicon on the source/drain regions and not on amorphous material, and forming elevated source/drains on the doped source/drain regions. In another aspect, a method of forming a contact to a substrate is disclosed. A contact opening is etched through amorphous insulating material over a node location ultimately comprising an outwardly exposed substantially crystalline surface. Within a chemical vapor deposition reactor, a gaseous precursor comprising silicon is provided under conditions effective to selectively deposit polysilicon on the outwardly exposed crystalline node location surface and not on the insulating material.

REFERENCES:
patent: 4497683 (1985-02-01), Celler et al.
patent: 4948755 (1990-08-01), Mo
patent: 4963506 (1990-10-01), Liaw et al.
patent: 4966868 (1990-10-01), Murali et al.
patent: 5006911 (1991-04-01), Sivan
patent: 5037775 (1991-08-01), Reisman
patent: 5080933 (1992-01-01), Grupen-Shemansky et al.
patent: 5110757 (1992-05-01), Arst et al.
patent: 5124276 (1992-06-01), Samata et al.
patent: 5364815 (1994-11-01), Osada
patent: 5441012 (1995-08-01), Aketagawa et al.
patent: 5607878 (1997-03-01), Otsuka et al.
patent: 5646073 (1997-07-01), Grider et al.
patent: 5663098 (1997-09-01), Creighton et al.
patent: 5818100 (1998-10-01), Grider et al.
patent: 6013575 (2000-01-01), Itoh
patent: 6017823 (2000-01-01), Shishiguchi et al.
patent: 6069036 (2000-05-01), Kim
Wolf, Stanley, Dec. 1986, "Silicon Procesessing for The VLSI ERA", pp. 183 & 191.
Violette, Katherine E., et al., "Low Temperature Selective Silicon Epitaxy By Ultra High Vacuum Rapid Thermal Chemical Vapor Deposition Using Si.sub.2 H.sub.6, and Cl.sub.2 ", Appl. Phys. Lett., vol. 68(1), pp. 66-68 (Jan. 1996).

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