Method of fabricating landing pad

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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Details

438632, 438633, 438626, 438612, 438618, 438253, 438597, 438706, 438719, H01L 214763, H01L 2144, H01L 21302, H01L 218242

Patent

active

061598437

ABSTRACT:
A method of fabricating a landing pad. A gate electrode is formed on a substrate. The gate electrode has a top surface covered by a cap layer and a sidewall covered by a spacer. A polysilicon layer is formed to cover the gate. Using an oxygen based etchant to performed an isotropic chemical dry etching on the polysilicon layer, the polysilicon layer is planarized until a part of the spacer is exposed. The polysilicon layer is patterned to form a landing pad in contact with the substrate.

REFERENCES:
patent: 4431477 (1984-02-01), Zajac
patent: 5591302 (1997-01-01), Shinohara et al.
patent: 5780339 (1998-07-01), Liu et al.
patent: 5945350 (1999-08-01), Violette et al.

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