Method of manufacturing a MESFET with an epitaxial void

Details Method of manufacturing a MESFET with an epitaxial void Method of manufacturing a MESFET with an epitaxial void

1993-03-18

1994-08-09

Fourson, George

Fishing, trapping, and vermin destroying

437912, 437927, H01L 21265

Patent

active

053366263

ABSTRACT:
The present invention relates to a MESFET in which source and drain regions with inverse slopes are formed on a semi-insulating semiconductor substarate having the insulating layer by using the growth property according to the crystal direction and a channel is electrically separated from the substrate by forming the channel layer and a self-aligned gate electrode sequentially on the top of the void formed by the inverse slopes of the source and drain regions. Thus, the present invention achieves the suppression of the leakage current and the backgating effect without the formation of a buffer layer, the formation of the gate electrode without misalignment, a short effective gate length and a low gate resistivity, thereby operating at high speed.

REFERENCES:
patent: 4178197 (1979-12-01), Marinace
patent: 5274257 (1993-12-01), Kim et al.
Kim, Chang-Tae, Hong, C., Kwon, Y. "A GaAs MESFET with Very Short Channel Length . . . ", Business Center for Academic Societies Japan, Bunkyo-ku, Tokyo, Japan, 1991. Aug. 27-29, p. D-3-2.

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