Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1997-05-23
1999-11-02
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375375, 375376, 331 10, 327159, H03D 324
Patent
active
059784253
ABSTRACT:
The invention provides a hybrid phase-locked loop (PLL) containing digital and analog portions for digital and analog adjustments, respectively, of an output signal. The hybrid PLL is simple in design. Off-the-shelf controlled oscillators, such as a current controlled oscillator (CCO) can be used with this hybrid PLL. The digital and the analog portions of the hybrid PLL are separate from the controlled oscillator. The digital portion is for a first adjustment of the frequency of the output signal, such as during a calibration. The analog portion is for fine phase and frequency adjustment of the output signal.
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Chapter 3 entitled "The Classical Digital PLL (DPLL)" in book entitled Phase-Locked Loops; Theory, Design, and Applications by Roland E. Best published by McGraw-Hill, Inc., 1993.COPYRGT..
Chin Stephen
Hitachi Micro Systems Inc.
Jiang Lenny
LandOfFree
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