Memory cell evaluation semiconductor device, method of fabricati

Static information storage and retrieval – Read/write circuit – Differential sensing

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365149, G11C 702, G11C 1124

Patent

active

059782943

ABSTRACT:
A dummy cell part <31> includes a capacitor <311> having a first end which is connected to one of a plurality of pads <2> and a P-N junction element <312> having a first end which is connected to one of the plurality of pads <2> and a second end which is connected to one of the plurality of pads <2>. A sense part <32> is connected to a second end of the capacitor <311>, for sensing a potential on the second end of the capacitor <311> and outputting the result of sensing to one of the plurality of pads <2>. Thus, a memory cell evaluation semiconductor device which can evaluate a single memory cell, a method of fabricating the same and a memory cell evaluation method are obtained.

REFERENCES:
patent: 4231109 (1980-10-01), Ono et al.
patent: 5793671 (1998-08-01), Selcuk
patent: 5822240 (1998-10-01), Yoo

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory cell evaluation semiconductor device, method of fabricati does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory cell evaluation semiconductor device, method of fabricati, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory cell evaluation semiconductor device, method of fabricati will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2144860

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.