Semiconductor device and manufacturing method thereof

Details Semiconductor device and manufacturing method thereof Semiconductor device and manufacturing method thereof

1994-05-09

1995-08-22

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

H01L 3106

Patent

active

054442788

ABSTRACT:
A DRAM having a stacked-type capacitor whose structure has a capacitor lower electrode, a first impurity region connected thereto, a third impurity region formed by thermal diffusion of impurities included in the capacitor lower electrode, is disclosed in which an end portion of a third impurity region on the side of gate electrode can be effectively prevented from being extended from an end portion of a first impurity region on the side of gate electrode in the subsequent heat treatment. In the DRAM, an epitaxial silicon layer 8 or a polycrystalline silicon layer 28 having an impurity concentration lower than that of capacitor lower electrode 9 is interposed between capacitor lower electrode 9 and a first impurity region 3b, so that thermal diffusion of impurities in capacitor lower electrode 9 is reduced as compared with the conventional case. As a result, the end portion of the third impurity region which is formed by thermal diffusion on the side of the gate electrode is not extended from the end portion of the first impurity region on the side of the gate electrode, and an effective gate length is not shortened. Hence, a short channel effect and a punch through phenomenon can be effectively prevented.

REFERENCES:
patent: 5010379 (1991-04-01), Ishii
patent: 5045494 (1991-09-01), Choi et al.
patent: 5045904 (1991-09-01), Kobayashi et al.
patent: 5101251 (1992-03-01), Wakamiya et al.
patent: 5138412 (1992-08-01), Hioda et al.

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