Non-volatile integrated low-doped drain device with partially ov

Details Non-volatile integrated low-doped drain device with partially ov Non-volatile integrated low-doped drain device with partially ov

1995-05-31

1999-11-02

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257316, 257344, 257408, H01L 29792, H01L 29788, H01L 2976, H01L 2994

Patent

active

059775866

ABSTRACT:
A non-volatile integrated device having first and second dimensionally different polysilicon gate layers separated by an oxide layer for hot-carrier reliability. More specifically, the oxide and second polysilicon gate layer are selectively etched to form a second gate region over the first polysilicon gate layer that electrically contacts the first polysilicon gate in one direction and is isolated by the oxide in the other direction. Insulating sidewalls are formed over the first polysilicon gate layer regions that are not electrically contacted by the second gate layer to help isolate the second polysilicon gate and form an LDD structure within the substrate for the device.

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J.E. Moon et al., "A New LDD Structure: Total Overlap With Polysilicon Spacer (TOPS)," IEEE Electron Device Letters, vol. 11: No. 5, pp. 221-223, May 1990.
T. Huang et al., "A New LDD Transistor with Inverse-T Gate Structure," IEEE Electron Device Letters, vol. EDL-8, No. 4, pp. 151-153, Apr. 1987.
D.S. wen et al., "A self-Aligned Inverse-T Gate Fully Overlapped LDD Device for Sub-Half Micron CMOS," International Electron Devices Meeting 1989, Technical Digest, pp. 765-768, Dec. 1989.

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