Semiconductor device

Details Semiconductor device Semiconductor device

1988-12-05

1990-05-22

Wojciechowicz, Edward J.

357 234, 357 41, 357 46, 357 48, 357 13, H01L 2702

Patent

active

049281593

ABSTRACT:
A single-chip integrated semiconductor device, in which a P-type isolation layer, to which the ground voltage is applied, is grown on a semiconductor substrate and a power voltage is applied to the substrate, in which a vertical MOSFET has a drain region of a first N-type well region formed in the P-type isolation layer so as to reach the semiconductor substrate therethrough, and is used in an output device for a load, in which a P-channel MOSFET is provided in the N-type well region formed in the P-type isolation layer, a constant voltage lower than the power voltage being applied to the N-type well region, and an N-channel MOSFET is formed in the P-type isolation layer, and in which the P-channel and N-channel MOSFETs constitute a CMOS circuit constructing a peripheral circuit for the vertical MOSFET.

REFERENCES:
patent: 4798974 (1989-01-01), Reczek et al.
Einzinger et al., "Analog Techniques", IEEE International Solid-State Circuits Conference, Feb. 1986, 22, 23 and 289.

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