Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1997-06-25
1999-03-23
Sheikh, Ayaz R.
Electronic digital logic circuitry
Multifunctional or programmable
Array
326 91, 327170, G06F 1300, H03K 1756
Patent
active
058871500
ABSTRACT:
An integrated circuit provides for adjustable slew rate control for both rising and falling edges of an output provided to an SCSI bus. Slew rate is controlled by adaptively varying the charge and/or discharge rate of the gate electrode of an output driver's N-channel pull-down transistor. Charge time and, thus, the falling edge slew rate, is adaptively varied by selectively adding the current source P-channel transistors to a current bus coupled to the gate electrode of the pull-down transistor. Similarly, the discharge rate and, thus, the rising edge slew rate, is adaptively adjusted by selectively switching current sink transistors on to the current bus coupled to the pull-down transistor's gate electrode. The amount of currents sourced or sunk is determined by varying the W/L ratios of both the current source and current sink transistors.
REFERENCES:
patent: 3961279 (1976-06-01), Davis
patent: 5187686 (1993-02-01), Tran et al.
patent: 5266847 (1993-11-01), Kuo
patent: 5519338 (1996-05-01), Campbell et al.
patent: 5537070 (1996-07-01), Risinger
patent: 5703496 (1997-12-01), Sabin
Asami Takashi
Schneider Thomas R.
Adaptec, Inc.
Etienne Ario
Sheikh Ayaz R.
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