Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate
Patent
1994-05-06
1997-05-06
Fourson, George
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Thinning of semiconductor substrate
438152, 438667, 438107, H01L 2144
Patent
active
056271069
ABSTRACT:
A new method of connecting three-dimensional integrated circuit chips using trench technology is described. Semiconductor device structures are provided in and on the top side of a semiconductor substrate of a first and a second three-dimensional integrated circuit chip. Deep trenches are etched into the first semiconductor substrate. A conductive material is deposited into the trenches. An insulating material is deposited over the surface of the substrate, polished and planarized. The bottom side of the first semiconductor substrate is ground, polished, and selectively etched so that the deep trenches form protrusions from the bottom surface. A passivation layer and a polyimide layer are deposited on the bottom surface of the first semiconductor substrate and etched away around the protrusions. A passivation layer and a polyimide layer are deposited over the top surface of the second semiconductor substrate. Connection windows are etched through the two layers to the top conducting surface of the second semiconductor substrate. The first and second integrated circuits are aligned so that the protrusions on the bottom surface of the first integrated circuit chip fit into the connection windows in the top surface of the second integrated circuit chip. The polyimide layer on the bottom surface of the first integrated circuit contacts the polyimide layer on the top surface of the second integrated circuit completing the connection between the two chips.
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Everhart C.
Fourson George
United Microelectronics Corporation
Wright William H.
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