Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1994-03-31
1997-05-06
Thomas, Tom
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438699, H01L 2144, H01L 2148
Patent
active
056271042
ABSTRACT:
A method is provided for forming a substantially planarized surface of an integrated circuit, and an integrated circuit formed according to the same. A conductive area is formed over a portion of a dielectric region. A first spin-on-glass layer is formed over the conductive area and exposed dielectric region. A second spin-on-glass layer is formed over the first spin-on-glass layer; wherein the second spin-on-glass layer has a slower etch rate than the first spin-on-glass layer. A partial etchback of the first and second spin-on-glass layers is performed forming a substantially planar surface.
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Bryant Frank R.
Spinner III Charles R.
Galanthay Theodore E.
Gurley Lynne A.
Hill Kenneth C.
Jorgenson Lisa K.
SGS-Thomson Microelectronics Inc.
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