Method of forming an antifuse in an integrated circuit

Details Method of forming an antifuse in an integrated circuit Method of forming an antifuse in an integrated circuit

1996-01-26

1997-05-06

Tsai, Jey

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438627, 438643, H01L 2170, H01L 2700

Patent

active

056270984

ABSTRACT:
An antifuse structure in an integrated circuit including a first interconnection line, a second interconnection line formed over the first interconnection line, and a plurality of programming layers between the first and second interconnection lines. Each pair of programming layers has a metal layer therebetween which dissolves with the programming layers to form a conducting link during the programming of such antifuse structure. Such antifuse structure may also include a conductive plug between the programming layers and the second interconnection line.

REFERENCES:
patent: 5233217 (1993-08-01), Dixit et al.
patent: 5373169 (1994-12-01), McCollum et al.
patent: 5387812 (1995-02-01), Forouhi et al.

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