Static semiconductor memory device and manufacturing method ther

Details Static semiconductor memory device and manufacturing method ther Static semiconductor memory device and manufacturing method ther

1998-01-21

1999-03-23

Meier, Stephen D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257903, H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

058863885

ABSTRACT:
NMOS transistors as well as pMOS transistors are formed in an SOI layer. One of the impurity diffusion regions of the transistors are respectively connected. A longitudinal end of polysilicon layer extends in one direction to be connected to one of the impurity diffusion regions of transistor. A longitudinal end of a polysilicon layer extends in a direction which is opposite from the above mentioned one direction to be connected to one of the impurity diffusion regions of transistor. As a result, the area for a memory cell region in a static semiconductor memory device can be reduced, and the interconnection structure can be simplified.

REFERENCES:
patent: 4910576 (1990-03-01), Campbell et al.
patent: 5206533 (1993-04-01), Houston
patent: 5646423 (1997-07-01), Megaro et al.

Affiliated with

Also associated with

Rating

Static semiconductor memory device and manufacturing method ther does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Static semiconductor memory device and manufacturing method ther, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Static semiconductor memory device and manufacturing method ther will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2128900