Semiconductor memory device having a trench capacitor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257301, 257303, 257305, 257622, 257901, H01L 2968, H01L 2978, H01L 2992

Patent

active

053090080

ABSTRACT:
A p-type silicon substrate is arranged on an n-type silicon substrate and a trench is formed in the p-type silicon substrate. An insulating film for separating elements from the other is formed along the upper side wall of the trench. A diffusion layer which serves as a capacitor electrode, and a capacitor insulating film are formed in the substrate along the lower side wall of the trench. A storage electrode is formed in the trench. This storage electrode is connected to a diffusion layer of MOSFET via the electrode and the diffusion layer. Even when the diameter of the trench is made small, the surface area of the storage electrode can be kept large enough because the diffusion layer which serves as the capacitor electrode is formed in the substrate along the side wall of the trench.

REFERENCES:
patent: 4794434 (1988-12-01), Pelley
patent: 4801988 (1989-01-01), Kenney
patent: 4801989 (1989-01-01), Taguchi
patent: 4803535 (1989-02-01), Taguchi
patent: 4967248 (1990-10-01), Shimizu
patent: 4969022 (1990-11-01), Nishimoto et al.
"A 4.2um.sup.2 Half-V.sub.cc Sheath-Plate Capacitor DRAM Cell with Self-Aligned Buried Plate-Wiring", T. Kaga et al., Central Research Laboratory, Hitachi, Ltd. Kakubunji, Tokyo 135, Japan, 1987.

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