Integrated circuits having patterns of mirror images and package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Patent

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Details

254 48, 254724, 254784, 254786, H01L 2348, H01L 2358

Patent

active

056915705

ABSTRACT:
Normal and reverse IC patterns are each a mirror image of the other. The normal and reverse IC patterns are simultaneously formed on a semiconductor wafer and are simultaneously tested. The wafer with these IC patterns is cut into chips, which are packaged. The normal and reverse IC packages show identical parasitic impedance and uniform performance.

REFERENCES:
patent: 5165067 (1992-11-01), Wakefield et al.
patent: 5285082 (1994-02-01), Axer
patent: 5473198 (1995-12-01), Hagiya et al.

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