Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-08-28
2000-09-26
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714719, 710260, G06F 1126
Patent
active
061254568
ABSTRACT:
To perform the self-diagnostic of the CPU, the CPU monitor macro service is activated in response to the interrupt signal from the external. In the CPU monitor macro service, according to the CPU monitor macro service code in the instruction code storage area, the initial value .alpha. for use in diagnosing the CPU which has been written in the RAM previous to the initiation of the CPU monitor macro service is stored in the TA register. Also, the address .beta. denoting the output destination of the execution resultant value of diagnosing the CPU by using the initial value .alpha. is stored in the TC register. The initial value .alpha. is used for checking an address and a path related to the RAM, and for checking the register saving the data in interrupt processing. Subsequently, the arithmetic operation unit, ALU executes the operation on the execution resultant value to transfer operated execution resultant value to the ALU register. Thereafter, the execution resultant value is forwarded to the TA register, and is further to output to the output destination in the external memory designated by the address .beta. stored in the TC register via the input/output port, the status of the microcomputer is checked at the external thereof.
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Beausoliel, Jr. Robert W.
NEC Corporation
Revak Christopher A.
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