Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257303, 257306, H01L 27108, H01L 2976, H01L 2994

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active

056915500

ABSTRACT:
A semiconductor device includes a first N-type region formed in a P-type silicon substrate, trenches formed in the substrate, second N-type regions each formed from at least the bottom of a corresponding one of the trenches into the substrate, these second N-type regions contacting each other to constitute a wiring layer and being also in contact with the first N-type region, and an electrode for applying a predetermined potential to the second N-type regions via the first N-type region. Since a potential is supplied to the wiring layer formed in the substrate via the first N-type region, no special design, such as formation of a terminal trench, is required. A potential can be easily supplied to the wiring layer formed in the semiconductor substrate, and the device can be easily fabricated.

REFERENCES:
patent: 4918502 (1990-04-01), Kaga et al.
patent: 5045904 (1991-09-01), Kobayashi et al.
S. Yoshikawa et al., "Process Technologies for a High Speed 16MDRAM with Trench Type Cell", Symposium on VLSI Technology Digest of Technical Papers, 1989, pp. 67-68.
Kaga, et al., "A 4.2 UM.sup.2 Half-V.sub.cc Sheath-Plate Capacitor DRAM Cell with Self-Aligned Buried Plate-Wiring", International Electron Devices Meeting 1987, Technical Digest Dec. 1987, Washington, D.C. pp. 332-335.

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