Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-06-17
2000-09-26
Chaudhuri, Olik
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257409, 257410, H01L 2976, H01L 2994, H01L 31062, H01L 31113
Patent
active
061246190
ABSTRACT:
In order to improve isolation between an FS (field shielding) electrode and a gate electrode (6), upper and lower major surfaces of a polysilicon layer (35) forming a principal part of an FS electrode (5) are covered with nitride films (SiN films) (34, 36) respectively. Therefore, it is possible to inhibit portions in the vicinity of edge portions of the polysilicon layer (35) from being oxidized by an oxidant following oxidation for forming a gate insulating film (14). Thus, the polysilicon layer (35) is inhibited from deformation following oxidation, whereby the distance between an FS electrode (5) and a gate electrode (6) is sufficiently ensured. Consequently, isolation between the FS electrode (5) and the gate electrode (6) is improved.
REFERENCES:
patent: 4332078 (1982-06-01), Peek et al.
patent: 4593454 (1986-06-01), Baudrant et al.
patent: 4994893 (1991-02-01), Ozake et al.
patent: 5067000 (1991-11-01), Eimori et al.
patent: 5225704 (1993-07-01), Wakamiya et al.
patent: 5225705 (1993-07-01), Hiyama et al.
patent: 5545578 (1996-08-01), Park et al.
patent: 5610099 (1997-03-01), Stevens et al.
patent: 5641989 (1997-06-01), Tomioka
patent: 5710453 (1998-01-01), Bryant
patent: 5714787 (1998-02-01), Eguchi et al.
patent: 5747845 (1998-05-01), Iwasa
patent: 5754464 (1998-05-01), Tomioka
patent: 5762813 (1998-06-01), Takiyama et al.
patent: 5766996 (1998-06-01), Hayakawa et al.
patent: 5814553 (1998-09-01), Chuang et al.
T. Iwamatsu, et al., "CAD-Compatible High-Speed CMOS/SIMOX Technology Using Field-Shield Isolation for 1M Gate Array", IEEE/IEDM, (1993), pp. 475-478.
T. Iwamatsu, et al., "High-Speed 0.5.mu.m SOI 1/8 Frequency Divider with Body-Fixed Structure for Wide Range of Applications", Extended Abstracts of the 1995 International Conference on Solid State Devices and Materials, (Osaka, Japan, 1995), pp. 575-577.
Patent Abstract of Japan, vol. 005, No. 044 (E-050), Mar. 24, 1991, JP 56-001546, Jan. 9, 1981.
S.A. Abbas, IBM Technical Disclosure Bulletin, vol. 15, No. 10, pp. 3022-3023, "FET Integrated Circuit Having Two Polysilicon Layers," Mar. 1973.
Patent Abstracts of Japan, vol. 096, No. 006, Jun. 28, 1996, JP 08 051145, Feb., 20, 1996.
Ipposhi Takashi
Iwamatsu Toshiaki
Maeda Shigenobu
Maegawa Shigeto
Yamaguchi Yasuo
Cao Phat X.
Chaudhuri Olik
Mitsubishi Denki & Kabushiki Kaisha
LandOfFree
Semiconductor device including upper, lower and side oxidation-r does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device including upper, lower and side oxidation-r, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device including upper, lower and side oxidation-r will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2102363