Stacked semiconductor structure for high integration of an integ

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257350, 257351, 257352, 257353, 257354, 257355, H02L 2900

Patent

active

061246158

ABSTRACT:
A stacked semiconductor structure is designed for component arrangement of an IC (integrated circuit) device having a large number of various types of junction devices, such as diodes, well resistors, N.sup.+ resistors, and BJTs (bipolar junction transistors) and MOS (metal-oxide semiconductor) transistors. The stacked semiconductor structure is constructed on an SOI (silicon-on-insulator) structure which includes a semiconductor substrate; a buried insulator layer formed over the substrate; and a silicon film formed over the buried insulator layer. Based on this SOI structure, the various types of junction devices are arranged in the substrate beneath the buried insulator layer; while the MOS transistors are arranged in the silicon film above the buried insulator layer, with the silicon film further being further formed with a plurality of trenches for isolating the MOS transistors from each other. This stacked semiconductor structure can help reduce the bulk of these junction devices for high integration of the IC device while nonetheless providing proper isolations between the various junction devices and MOS transistors in the IC device.

REFERENCES:
patent: 5359219 (1994-10-01), Hwang
patent: 5554872 (1996-09-01), Baba et al.

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