Non-volatile trench semiconductor device having a shallow drain

Details Non-volatile trench semiconductor device having a shallow drain Non-volatile trench semiconductor device having a shallow drain

1997-12-18

2000-09-26

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257321, 257322, 257330, 257332, H01L 29788

Patent

active

061246085

ABSTRACT:
A non-volatile memory device having a trench structure and a shallow drain region is formed in a substrate, thereby facilitating increased densification, improved planarization and low power programming and erasing. Embodiments include forming first and second trenches in a substrate and, in each trench, sequentially forming a substantially U-shaped tunnel dielectric layer and a substantially U-shaped floating gate electrode. A dielectric layer is then formed on the floating gate electrode extending on the substrate surface and a substantially T-shaped control gate electrode is formed filling the trench and extending on the substrate. Sidewall spacers are formed on side surfaces of the control gate electrode and dielectric layer, followed by ion implantation to form a shallow drain region between the first and second trenches and source regions extending to a greater depth than the drain region. During ion implantation, a region containing an impurity of the first conductivity type is formed at the intersection of each trench and the substrate surface to prevent shorting between the source/drain region and gate electrodes.

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