Semiconductor memory device having dual boosting circuits to red

Details Semiconductor memory device having dual boosting circuits to red Semiconductor memory device having dual boosting circuits to red

1996-07-16

1997-12-30

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365149, 36518911, 365203, G11C 1300

Patent

active

057038147

ABSTRACT:
A semiconductor memory device includes pairs of bit lines, first circuits which are respectively coupled to the pairs of bit lines and precharge the pairs of bit lines in accordance with a first control signal, sense amplifiers respectively coupled to the pairs of bit lines, and second circuits which are respectively provided between the pairs of bit lines and the sense amplifiers and selectively connect the pairs of bit line to the sense amplifiers in response to a second control signal. A third circuit produces first and second boosted voltages from a power supply voltage and supplies the first and second boosted voltages to the first and second circuits respectively. The first control signal is produced from the first boosted voltage and the second control signal is produced from the second boosted voltage. The first boosted voltage being lower than the second boosted voltage.

REFERENCES:
patent: 5272393 (1993-12-01), Horiguchi et al.
patent: 5420823 (1995-05-01), Yonaga et al.
patent: 5426333 (1995-06-01), Maeda
patent: 5446697 (1995-08-01), Yoo et al.
patent: 5448198 (1995-09-01), Toyoshima et al.

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