Static information storage and retrieval – Read/write circuit – Testing
Patent
1984-07-16
1986-06-24
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Testing
365182, G11C 700
Patent
active
045970629
ABSTRACT:
A non-volatile semiconductor memory system includes a memory cell array having floating gate type MOS transistors, and a boosting circuit for boosting a write voltage applied to the memory system. A distributing circuit is further contained for selectively distributing a boosted voltage from the boosting circuit to at least a part of the memory system, for example, row lines in response to a control signal.
REFERENCES:
patent: 4342103 (1982-07-01), Higuchi et al.
Asano Masamichi
Iwahashi Hiroshi
Popek Joseph A.
Tokyo Shibaura Denki Kabushiki Kaisha
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