Multilevel memory devices having memory cell referenced word lin

Details Multilevel memory devices having memory cell referenced word lin Multilevel memory devices having memory cell referenced word lin

1998-12-23

2000-06-13

Le, Vu A.

Static information storage and retrieval

Floating gate

Particular biasing

36518503, 36518521, 36518524, G11C 1606

Patent

active

060757256

ABSTRACT:
A word line voltage generating apparatus is provided for a multi-level memory device including a plurality of memory cells, each of which has a programmable threshold voltage such that the memory cell produces a current in response to a word line voltage applied thereto. The apparatus includes a plurality of memory cell referenced regulators connected to an output terminal that is configured to connect to the plurality of memory cells, a respective one of the memory cell referenced regulators including a variable current mirror having a controlled current path and an output current path including the output terminal, the controlled current path having a controlled impedance therein that provides a variable impedance responsive to a control voltage applied thereto such that current produced at the output terminal is proportional to current in the controlled current path, and a control circuit connected between the output terminal and the controlled impedance and including a dummy memory cell having a predetermined threshold voltage, the control circuit operative to apply a control voltage to the controlled impedance to vary a current at the output terminal when an output voltage at the output terminal is greater than a sum of the predetermined threshold voltage of the dummy memory cell and a predetermined offset voltage. According to an embodiment of the present invention, the control circuit comprises a dummy memory cell transistor connected in series with a resistor.

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