Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1997-02-18
1999-02-16
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711 4, 711111, 711112, 711170, 711171, 711172, G06F 1208
Patent
active
058731253
ABSTRACT:
Logical tracks having a constant capacity are composed of combinations of physical tracks in a plurality of disks. For example, in a case where the data recording region of the first disk is divided into three zones A, B, C and that of the second disk is divided into three zones A', B', C', the physical tracks of outer zone A and inner zone C', middle zones B and B' and inner zone C and outer zone A' are combined, respectively. A host apparatus issues a read/write command by using a logical track address, and a track address converter converts the logical track address into a plurality of physical track addresses. A magnetic disk controlling apparatus writes the entire part of a record instructed to be written by the host apparatus in a physical track in one magnetic disk apparatus, or splits the record into two portions and consecutively writes them into physical tracks of both magnetic disks.
REFERENCES:
patent: 4430701 (1984-02-01), Christian et al.
patent: 4432025 (1984-02-01), Grogan
patent: 4814903 (1989-03-01), Kulakowski et al.
patent: 5155835 (1992-10-01), Belsan
patent: 5473761 (1995-12-01), Parks et al.
Chan Eddie P.
Fujitsu Limited
Nguyen Than V.
LandOfFree
Logical address structure for disk memories does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Logical address structure for disk memories, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Logical address structure for disk memories will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2072638