Integrated circuit device in which gate oxide thickness is selec

Details Integrated circuit device in which gate oxide thickness is selec Integrated circuit device in which gate oxide thickness is selec

1998-06-18

2000-06-13

Munson, Gene M.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257346, H01L 2978

Patent

active

060752734

ABSTRACT:
An integrated circuit device in which the gate oxide of the devices in the integrated circuit device is selected to control plasma damage during device processing is disclosed. The integrated circuit device has at least two transistors, each transistor having a source, drain, gate and channel. At least one device has a channel length that is greater than 0.5 .mu.m and at least one device has a channel length that is less than 0.5 .mu.m. The device having a channel length that is greater than 0.5 .mu.m has a gate oxide thickness that is less than the gate oxide thickness of the device having a channel length that is less than 0.5 .mu.m. The relative thickness of the gate oxide for the shorter channel devices and the longer channel devices is selected so that the tunneling leakage current that passes through the gate oxide for the longer channel devices is at least two orders of magnitude greater than the tunneling current through the gate oxide of the shorter channel devices.

REFERENCES:
patent: 3731161 (1973-05-01), Yamamoto
patent: 5276344 (1994-01-01), Arima et al.
patent: 5495122 (1996-02-01), Tada
patent: 5554870 (1996-09-01), Fitch et al.
patent: 5650651 (1997-07-01), Bui
"Quantum-Mechanical Modeling of Electron Tunneling Current from the Inversion Layer of Ultra-Thini-Oxide nMOSFET's", by Lo, S. H. et al., IEEE, pp. 309-310 (May 1997).
"Evaluation and Control of Device Damage in High Density Plasma Etching" by Gadgil, P. K., et al., J. Vac. Sci. Technol., B 12(1), pp. 102-111 (Jan./Feb. 1994).

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