Electrical characterization of an insulating layer covering a co

Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed

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438 14, 257 48, H01L 2166

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active

060748869

ABSTRACT:
The present invention relates to the characterization of an insulating layer (14), a first surface of which covers a conducting or semiconducting surface of a substrate, the second surface of the insulating layer (14) being electrically accessible, the characterization consisting of verifying the quality of electrical insulation presented by at least one area (32) of the insulating layer (14) by means of an electrical test. The invention comprises the following steps:

REFERENCES:
patent: 5907764 (1999-05-01), Lowell et al.
patent: 6014034 (2000-01-01), Arora et al.
Wang H et al, An Optimized Gate Oxide Breakdown Test By Activating Oxide Traps at Low Fields, Dec. 13, 1992, pp. 143-146.
IBM Technical Disclosure Bulletin, Characterizing Weak Spots in Dielectric Layers, Sep. 1991, vol. 34, No. 4B, p. 98-99.

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