Method of fabricating semiconductor device with cavity interpose

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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Details

438620, 438624, 438625, 438631, 438638, H01L 214763

Patent

active

061469890

ABSTRACT:
A wiring layer is formed on a first interlayer insulation film. An oxide film is formed on the wiring layer. The oxide film is patterned to have a gap corresponding to a gap between wirings. Thereafter, the wiring layer and a surface layer of the first interlayer insulation film are etched using the oxide film remaining on the wiring layer as a mask. On this occasion, two wirings are formed by the wiring layer so as to be separated from each other by the gap. Subsequently, a second interlayer insulation film is formed on the wirings and in the gap between the wirings with a cavity remaining in the gap by means of a bias ECR film deposition method.

REFERENCES:
patent: 4667395 (1987-05-01), Ahigren et al.
patent: 5569618 (1996-10-01), Matsubara
patent: 5578522 (1996-11-01), Nakamura et al.
patent: 5712140 (1998-01-01), Ishii et al.

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