Multi-screen generation circuit

Details Multi-screen generation circuit Multi-screen generation circuit

1991-01-09

1992-11-03

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358181, 358 22, H04N 974, H04N 5262, H04N 5272

Patent

active

051610124

ABSTRACT:
There is disclosed a multi-screen generating circuit capable of freely displaying on a main screen a plurality of multi-screens corresponding to 4 sub-screens, 9 sub-screens, 13 sub-screens and 16 sub-screens according to size of the main screen, the circuit also being capable of giving free choices in selecting any type of multi-screens regardless of the number of broadcasting channels which may differ from one region to another. The inventive subject to carry out the object of the invention includes: a command decoder 10, an address signal generator 20, a writing reference signal generation circuti(WRS) 30, a writing display controller 140, an analog-to-digital clock generator 188, a first multiplexer 60, a serial-parallel converter 50(SPC) 50, a write timing generator 70, a read timing generation circuit 80, a latch section 90, and a data multiplexer 100.

REFERENCES:
patent: 4636864 (1987-01-01), Annegarn et al.
patent: 4758892 (1988-07-01), Bloomfield
patent: 4782391 (1988-11-01), McNeely et al.
patent: 4839728 (1989-06-01), Casey
patent: 5016106 (1991-05-01), Yong-Je et al.

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