Jtag testing of buses using plug-in cards with Jtag logic mounte

Details Jtag testing of buses using plug-in cards with Jtag logic mounte Jtag testing of buses using plug-in cards with Jtag logic mounte

1995-12-08

1998-12-22

Beausoliel, Jr., Robert W.

Excavating

39518319, G01R 3128

Patent

active

058526170

ABSTRACT:
A plug-in JTAG test card includes JTAG boundary scan circuitry which may be used to drive JTAG test data out onto portions of buses connected to peripheral plug-in slots. One or more of the JTAG plug-in test cards can be used to verify the integrity of each of the point-to-point connections on the buses which terminate in the peripheral plug-in slots. In one advantageous embodiment, the plug-in JTAG test cards simulate a dual in-line memory module (DIMM) or single in-line memory module (SIMM) cards which include scan test buffer circuitry but do not actually include memory chips so that an inexpensive plug-in card can be used to provide JTAG testing at the manufacturing level for multiple motherboards. In a particularly preferred embodiment, JTAG boundary scan buffer circuits, such as, for example, SN74ABT8245's, are used as test circuits rather than for their intended use as interface circuits.

REFERENCES:
patent: 5198759 (1993-03-01), Ohnesorge
patent: 5331274 (1994-07-01), Jarwala et al.
patent: 5416409 (1995-05-01), Hunter
patent: 5428800 (1995-06-01), Hsieh et al.
patent: 5497378 (1996-03-01), Amini et al.
patent: 5526365 (1996-06-01), Whetsel
patent: 5544309 (1996-08-01), Chang et al.
patent: 5608736 (1997-03-01), Bradford et al.
Maunder, et al., "IEEE Standard Test Access Port and Boundary-Scan Architecture", Institute of Electrical and Electronics Engineers, Inc., Oct. 21, 1993, pp. iii-A-12.
"IEEE Standard Test Access Port and Boundary-Scan Architecture", Circuits and Devices Communications Technology, IEEE Std. 11.49.1-1990 (includes IEEE Std 1149.1A-1993), Oct. 21, 1993.

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