Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-12-03
2000-07-18
Auve, Glenn A.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 25, 710100, 710107, G01R 3138
Patent
active
060922192
ABSTRACT:
A system for flexibly and efficiently communicating diagnostic information about an integrated ASIC device. Where the ASIC is associated with a PCI bus, the bus parking or idle state for the PCI bus is used for placing status or diagnostic information relating to or about the ASIC on the PCI bus. This information can then be observed and used in a debugging process.
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PCI to PCI Bridge Architecture Specification.
Auve Glenn A.
Micro)n Technology, Inc.
Pancholi Jigar
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