Method of isotropically dry etching a polysilicon containing run

Details Method of isotropically dry etching a polysilicon containing run Method of isotropically dry etching a polysilicon containing run

1990-04-27

1992-11-03

Simmons, David A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156643, 156646, 156657, 1566591, 156662, H01L 2100

Patent

active

051604086

ABSTRACT:
Disclosed is a method of isotropically dry etching a current conducting runner comprising polysilicon material which is formed on a silicon substrate wafer containing integrated semiconductor circuits. The method employs a parallel plate reactor which is controllable to provide intermittent pulses of power over the parallel plates. Gases are injected to within the reactor to provide a reactive gas mixture at a preselected pressure. Preselected intermittent pulses of power are applied to ionize the reactive gas mixture into a plasma state. Such intermittent pulses are defined by an RFon period, an RFoff period, and an RFrepeat period. The ratio of RFon:RFrepeat is preferably from about 0.35 to 0.60. The wafer is subjected to the intermittent pulses and reactive gas mixture at the preselected pressure for a preselected amount of time to selectively isotropically etch the current conducting runner. The invention has specific application to isotropically dry etching a WSi.sub.x /polysilicon sandwich structure. With such a structure, the preferred reactive gas mixture is SF.sub.6, Cl.sub.2, O.sub.2, and an inert carrier gas in approximate respective volume ratios of 10.0.+-.5%:2.0.+-.5%:3.0.+-.5%:15.0.+-.5%.

REFERENCES:
patent: 4468285 (1984-08-01), Bayman et al.
patent: 4473436 (1984-09-01), Beinvogl
patent: 4477310 (1984-10-01), Park et al.
patent: 4502913 (1985-03-01), Lechaton et al.
patent: 4713141 (1987-12-01), Tsang
patent: 4741799 (1988-05-01), Chen et al.
patent: 4778563 (1989-10-01), Stone
patent: 4824802 (1989-04-01), Brown et al.
patent: 4836887 (1989-06-01), Daubenspeck et al.
patent: 4863549 (1989-09-01), Grunwald
patent: 4891118 (1990-01-01), Ooiwa et al.
"Plasma Etching In Semiconductor Fabrication"; by Russ A. Morgan; .COPYRGT.1985; Elsevier Co. N.Y., NY.
Wolf et al., "Silicon Processing For The VLSI Era-vol. 1: Process Technology", pp. 551-557.
Flamm et al., "The Design of Plasma Etchants", (1981) pp. 317-363.
Mogab, "VLSI Technology", pp. 303-342.

Affiliated with

Also associated with

Rating

Method of isotropically dry etching a polysilicon containing run does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of isotropically dry etching a polysilicon containing run, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of isotropically dry etching a polysilicon containing run will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2048299