Method of manufacturing a semiconductor device through a reduced

Details Method of manufacturing a semiconductor device through a reduced Method of manufacturing a semiconductor device through a reduced

1997-06-09

1998-12-22

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438660, 438661, 438663, 438637, 438666, H01L 214763

Patent

active

058519157

ABSTRACT:
In a method of manufacturing a semiconductor device including a first and a second insulator film and a first and a second conductive layer held to the first and said second insulator films, respectively. The first insulator film is formed to have a first wiring trench along an upper surface of the first insulator film and a first through hole extending from the first wiring trench to a lower surface of the first insulator film. A first conductive material is deposited on the upper surface of the first insulator film to fill the first wiring trench and the first through hole. Thereafter, the first conductive material is partially removed to have an upper surface coplanar with the upper surface of the first insulator film. As a result, the first conductive material becomes the first wiring layer. Next, the second insulator film and the second wiring layer are formed in the manner which is similar to that of forming the first insulator film and the first wiring layer.

REFERENCES:
patent: 4758533 (1988-07-01), Magee et al.
patent: 4997518 (1991-03-01), Madokoro
patent: 5124780 (1992-06-01), Sandhu et al.
patent: 5173442 (1992-12-01), Carey
patent: 5219787 (1993-06-01), Carey et al.
patent: 5242860 (1993-09-01), Nulman et al.
patent: 5244837 (1993-09-01), Dennison
patent: 5248628 (1993-09-01), Okabe et al.
patent: 5266521 (1993-11-01), Lee et al.
patent: 5356836 (1994-10-01), Chen et al.
patent: 5380678 (1995-01-01), Yu et al.
patent: 5395795 (1995-03-01), Hong et al.
patent: 5397742 (1995-03-01), Kim
patent: 5451543 (1995-09-01), Woo et al.
patent: 5468684 (1995-11-01), Yoshimori et al.
patent: 5639686 (1997-06-01), Hirano et al.
Wolf et al., Silicon Processing For The VLSI Era, vol. II, Lattice Press, 1990, pp. 273-285.
"High Density Damascene Wiring and Borderless Contacts for 64 m DRAM," by S. Roehl et al., VMIC Conference, Jun. 9-10, 1992, pp. 22-28.

Affiliated with

Also associated with

Rating

Method of manufacturing a semiconductor device through a reduced does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing a semiconductor device through a reduced, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a semiconductor device through a reduced will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2047141