Semiconductor memory circuit with bit line detector controlling

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

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Details

365190, 365208, 365210, 36523006, G11C 706

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active

055196616

ABSTRACT:
A semiconductor memory circuit comprises bit line pairs each of which has a pair of bit lines which are coupled to memory cells and have a first end portion and a second end portion, a pair of data bus lines, sense amplifiers each of which is coupled to a corresponding bit line pair, switching circuits each of which is coupled between the first end portion of the corresponding bit line pair and the data bus lines, each of the switching circuits connecting the bit line of the corresponding bit line pair and one of the data bus lines in response to a control signal, voltage difference detecting circuits each of which is coupled to the second end portion of the corresponding bit line pair, each of the voltage difference detecting circuits generating a detection signal when the bit lines of the corresponding bit line pair have different voltage potentials from each other, and a decoding circuit generating the control signals in response to address signals and the detection signal so that the corresponding bit line pair and the data bus lines are coupled together after the bit lines of the corresponding bit line pair have different voltage potentials from each other.

REFERENCES:
patent: 4803663 (1989-02-01), Miyamoto et al.
patent: 4807195 (1989-02-01), Busch et al.
patent: 4926382 (1990-05-01), Sakui et al.
patent: 4952826 (1990-08-01), Hoshi
patent: 5132930 (1992-07-01), Furutani et al.
patent: 5274598 (1993-12-01), Fujii et al.

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