Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1997-12-23
2000-08-15
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
711113, 714 6, G06F 1216
Patent
active
061051160
ABSTRACT:
A disk cache is controlled to continue duel data writing even during a degenerated mode of operation due to a failure of a cache memory, and also to continue a FAST WRITE process while maintaining reliability for thereby avoiding a drop in performance. If a memory module MM#1 fails, processing of dirty data 111 stored in the memory module MM#1 is continued using backup data 122 stored in a memory module MM#2 for the dirty data 111 stored in the memory module MM#1. The backup data 122 stored in the memory module MM#2 for the dirty data 111 stored in the memory module MM#1 is copied to a memory module MM#3, generating backup data 111' for the dirty data 111. Then, dirty data 131 stored in the memory module MM#3 is copied to the memory module MM#2, generating backup data 112' for the dirty data 131 stored in the memory module MM#3, instead of backup data 112 stored in the memory module MM#1.
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Chan Eddie P.
Ellis Kevin L.
NEC Corporation
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