Fishing – trapping – and vermin destroying
Patent
1995-02-27
1997-12-30
Trinh, Michael
Fishing, trapping, and vermin destroying
437 41TFT, 437229, H01L 21786
Patent
active
057029601
ABSTRACT:
A method for manufacturing a polysilicon thin film transistor in which a lower gate pattern is formed by stacking a conductive material on a transparent substrate, then a buffering insulating layer, a polysilicon layer, a gate insulating layer and a conductor layer are formed by sequentially stacking an insulating material, a polysilicon, an insulating material and a conductive material. Then a photoresist pattern is formed by coating a photoresist and exposing the backside of the photoresist using the lower gate pattern, and thereafter, an upper gate pattern is formed by etching the conductor layer using the photoresist pattern as a mask. The method of the present invention is suitable for manufacturing the polysilicon thin film transistor of an offset structure or of an LDD structure.
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Samsung Electronics Co,. Ltd.
Trinh Michael
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